Annotation of the article

Issue N1 2017 year

DOI: 10.17587/nmst.19.60-64

Distributed ESD Protection System for Nanometer CMOS Circuits

Adamov Yu.F., D. Sc., Professor, Principal Researcher, e-mail: adamov@ippm.ru, Balaka E.S., Ph. D., Senior Researcher, e-mail: balakaes@yandex.ru, Isayeva T.Yu., Ph. D., Junior Researcher, e-mail: tyuisaeva@mail.ru, Institute for Design Problems in Microelectronics of the Russian Academy of Sciences (IPPM RAS), Matveenko O.S., Ph. D., Senior Researcher, e-mail: unicfive@yandex.ru, Institute of Microwave Semiconductor Electronics of RAS, Moscow, 117105, Russian Federation

Smaller dimensions of elements and growing circuit integration make the problem of protection of products against electrostatic discharges more complicated. Chip area occupied by the protection elements increases. The most advanced protection techniques use the distributed circuits with common functional units for all protection devices on a chip. A reduction of the sizes of the power switching MOS transistors is achieved by increasing the amplitude of the control pulses. However, in order to increase the signal amplitude, an additional power supply (external or integrated) is required, which reduces the consumer quality of the products. In this paper the authors propose a technical solution, which will help to increase the amplitude of the pulse signals over the supply voltage with the use of the step-up drivers (voltage pulse generators). Most of the known methods for increasing the amplitude of the pulse signals use inductive elements or secondary power supplies accumulating energy for a long period of time. The proposed circuit generates pulse high amplitude signals in real time.

Keywords: distributed ESD protection systems, power switching MOS transistors size reduction for ESD protection devices, power switching MOS transistors size reduction due to increase of pulse control signal amplitude, voltage pulse generator with the amplitude exceeding the supply voltage (step-up driver)

pp. 60 - 64